The present application relates to a manufacturing method of a semiconductor integrated circuit device (or a semiconductor device), which can be applied, for example, to a manufacturing process of a power system semiconductor device.
Japanese Unexamined Patent Publication No. 2010-118536 (Patent Document 1) relates to embedded epitaxial growth for forming a super junction, etc., in a manufacturing process of a power system semiconductor device. In Patent Document 1, a technique is disclosed in a first example, in which a cap film comprised of a silicon oxide film is formed over the surface of a silicon substrate between the whole trenches in cell regions and around a target, and after embedded epitaxial growth is performed in that state, CMP (Chemical Mechanical Polishing) is performed. In this example, in order to leave the cap film around the target, only a first part of an overlying epitaxial layer is removed by the CMP, and then the remaining second part of the overlying epitaxial layer is removed by performing dry etch back on Si. On the other hand, a technique is disclosed in a second example, in which after trenches are formed by using a silicon oxide film as a mask, a cap film comprised of a silicon oxide film is left in a recess portion around a target, and after embedded epitaxial growth is performed in that state, the whole of an epitaxial layer is removed by performing CMP.
Japanese Unexamined Patent Publication No. 2011-249634 (Patent Document 2) relates to embedded epitaxial growth for forming super junction, etc., in a manufacturing process of a power system semiconductor device. In Patent Document 2, a technique is disclosed, in which after trenches for forming a super junction are formed, embedded epitaxial growth is performed in a state where the whole of a hard mask film for processing the trenches, such as a silicon oxide film, is left, and thereafter flattening of the surface is performed. Herein, in the flattening of the surface, after a first CMP treatment is first performed by using the hard mask film for processing the trenches as a stopper, the hard mask film is removed by wet etching, etc., and thereafter, a second CMP treatment is performed.
Japanese Unexamined Patent Publication No. 2009-224606 (Patent Document 3) relates to embedded epitaxial growth for forming a super junction, etc., in a manufacturing process of a power system semiconductor device. In Patent Document 3, a technique is disclosed, in which after trenches for forming super junction are formed, embedded epitaxial growth is performed in a state where the whole of a hard mask film for processing the trenches is removed, and thereafter CMP is performed.